1. Field of the Invention
The present invention relates to a method of manufacturing an opening through a dielectric layer.
2. Discussion of the Background
During the production of integrated circuits, it is often necessary to form vias to conducting regions underlying a dielectric layer. A common technique for etching overlaying dielectric layers is photolithography, in which light is used to form a pattern on a photosensitive film which has been deposited on the surface of a dielectric layer. Development of the resist results in a pattern, in which portions of the oxide are exposed. The exposed portions of the oxide may then be subject to selective etching.
When an opening is filled with a metal, especially aluminum, it is sometimes advantageous to round the top of the opening, forming "ears" on the upper portion of the opening. Rounding may typically be performed by a wet isotropic etching of the dielectric layer and overlying patterned resist, prior to dry anisotropic etching. Rounding provides for greater filling capability, especially when aluminum is the filling metal.
Increasing demands are being placed on the size of integrated circuits, calling for finer and finer resolution capabilities. For example a reliable, efficient process for forming openings of 0.5 .mu.m diameter is highly desired.
However, during wet isotropic etching of the patterned dielectric layer, excessive lateral etching of dielectric material directly underlying the patterned photoresist is common, resulting in a loss of resolution. Such non-selective etching creates a barrier to further size reduction of integrated circuits such that an efficient method of etching which provides for high selectivity, and in particular low L/V ratios would be welcome.